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 CXA1720Q
Read/Write Amplifier (with Built-in Filters) for FDDs For the availability of this product, please contact the sales office.
Description The CXA1720Q is an IC for use with floppy disk drives, and contains a Read circuit (with built-in filters), Write circuit, Erase circuit, and supply voltage detection circuit, all into a single chip. Features * Single 5 V power supply. * Filter system can be switched among four modes: 1M/2M, and inner track/outer track. This allows for a significant reduction in the number of external parts such as differentiator constants, low-pass filters, and switches. (Compared with conventional Sony products, the number of parts has been reduced by one-half.) * Filter characteristics can be customized. * Low pre-amplifier input conversion noise voltage of 2.0 nV/ Hz (typ.) keeps Read data output jitter to a minimum. The pre-amplifier voltage gain can be selected as either 100x or 200x. * The monostable multivibrator No. 1 pulse width switching function for the time domain filter permits switching between 1M and 2M mode. * Write current switching function permits switching of the Write current among four modes: 1M/2M and inner track/outer track. (Filter inner track/outer track switching is separate.)
HEAD 1A HEAD 0A HEAD 0B HEAD 1B
32 pin QFP (Plastic)
* Supply voltage detection circuit prohibits error writing during power ON/OFF or abnormal voltage. * Power consumption is kept down to 115 mW (typ.) and this IC is suitable for use with battery-driven FDDs. * Built in Time constant capacitors for monostable multivibrator Nos. 1 and 2. (The pulse width for monostable multivibrator No. 2 is fixed.) * Power saving function reduces power consumption when the IC is not in use. When in power saving mode (5 mW typ.), only the power supply ON/OFF detector functions. * The Write driver has a built-in reset circuit. When the mode is switched from Read mode to Write mode, the Write current flows from head 0A if head side 0 is selected and from head 1A if head side 1 is selected.
PREAMP OUT
Block Diagram and Pin Configuration
24
23
22
21
20
19
18
FILTER OUT A 17
VREF
HIGH GAIN
W/C 1 25 SET W/C 1 COMP 26 W/C 2 SET 27 W/C 2 COMP 28 D.GND 29 ERASE OUT 0 30 ERASE OUT 1 31 POWER 32 SAVE POWER MONITOR WRITE DRIVER
PREAMP FILTER DIFF+LPF (BPF)
FILTER 16 OUT B 15 COMP IN B 14 COMP IN A 13 A.GND
COMP
ERASE DRIVER
12 MMVA FILTER 11 SET
CONTROL LOGIC
TIME DOMAIN FILTER
10 Vcc HIGH DENSITY
9
1
POWER ON
2
WRITE DATA
3
READ DATA
4
WRITE CURRENT
5
WRITE GATE
6
ERASE GATE
7
SIDE 1
8
FILTER CONTROL
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
--1--
E93717-TE
CXA1720Q
Structure Bipolar silicon monolithic IC Absolute Maximum Ratings (Ta=25 C) * Supply voltage * Digital signal input pin (note) input voltage * Power ON output applied voltage * Erase output applied voltage * Head 0A, 0B, 1A, 1B applied voltage * Power ON output sink current * Erase output sink current * Operating temperature * Storage temperature * Allowable power dissipation Supply Voltage Range VCC 4.4 to 6.0 V
VCC
Topr Tstg PD
7 V -0.5 to VCC+0.3 V VCC+0.3 V VCC+0.3 V 15 V 7 mA 30 mA -20 to +75 C -65 to +150 C 500 mW
Note) WRITE DATA, WRITE CURRENT, WRITE GATE, ERASE GATE SIDE1, FILTER CONTROL, HIGH DENSITY, HIGH GAIN, POWER SAVE
--2--
CXA1720Q
Pin Description
Pin No. 1 Symbol POWER ON Pin voltage -- 100k 1 Equivalent circuit Vcc
(Ta=25 C, VCC=5 V)
Description Reduced voltage detection output. This is an open collector that outputs a low signal when VCC is below the specified value.
A.GND 2 WRITE DATA -- Vcc Write data input. This pin is a Schmitt-type input and is triggered when the logical voltage goes from high to low.
1k 2
2.3V 3 READ DATA -- 140
A.GND Read data output. This pin is active when the logical voltage of the Write gate signal and the Erase gate signal is high.
Vcc
3
D.GND 4 5 6 7 WRITE CURRENT WRITE GATE ERASE GATE SIDE1 -- -- -- --
100k 8 9 4 5 6 7 1k 2.1V A.GND
Vcc
8
FILTER CONTROL HIGH DENSITY HIGH GAIN
--
20
9
--
20
--
Write current control. The Write current is increased when the logical voltage is low. Write gate signal input. The Write system is active when the logical voltage is low. Erase gate signal input. The Erase system is active when the logical voltage is low. Head side switching signal input. The HEAD1 system is active when the logical voltage is low, and the HEAD0 system is active when the logical voltage is high, but only when the logical voltage for the Write gate and the Erase gate is high. Filter inner track/outer track mode control. Inner track mode is selected when the logical voltage is low. Filter, time domain filter and Write current 1M/2M mode control. 2M mode is selected when the logical voltage is low. Pre-amplifier voltage gain selection. Gain of 100x is selected when the logical voltage is high; gain of 200x is selected when the logical voltage is low.
--3--
CXA1720Q
Pin No. 10 11
Symbol VCC FILTER SET
Pin voltage -- 3.8 V
Equivalent circuit
Description Power supply (5 V) connection. Connection for filter cut-off frequency setting resistor. Connect the filter cut-off frequency setting resistor RF between this pin and VCC to set the cutoff frequency.
Vcc 1k 1.2V 147 11
A.GND
12
MMVA
0.5 V
Vcc
147 12 1.2V
Time domain filter monostable multivibrator No. 1 pulse width setting pin. Connect the monostable multivibrator No. 1 pulse width setting resistor RA between this pin and A.GND.
A.GND 13 14 A. GND COMP IN A -- 3.3 V 10k 14 147 15 COMP IN B 3.3 V 15 147 10k 16k Analog system GND connection. Comparator differential inputs.
Vcc
60 16 FILTER OUT B 3.3 V 140 140 Vcc
A.GND Filter differential outputs.
16 17 FILTER OUT A 3.3 V 17
500
500
A.GND
--4--
CXA1720Q
Pin No. 18
Symbol VREF
Pin voltage 2.8 V
Equivalent circuit Vcc
Description Connection for internal reference voltage decoupling capacitor. Connect the decoupling capacitor CREF between this pin and A.GND.
500 18
120 19 PREAMP OUT 2.8 V 140
A.GND Vcc Pre-amplifier output.
19
320 21 22 23 24 HEAD 1B HEAD 1A HEAD 0B HEAD 0A -- -- -- --
24 23 22 21
A.GND Connection for magnetic head input/output. Connect the recording/playback magnetic head to these pins, and connect the center tap to VCC. When the logical voltage for Pin 7 (SIDE1) is low, the HEAD1 system is active; when the logical voltage is high, the HEAD0 system is active.
A.GND
25
W/C1SET
Vcc 1.2V 147 147 25 27
Connection for 1M write current setting resistor. Connect the Write current setting resistor RW1 between this pin and VCC to set the Write current.
27
W/C2SET
Connection for 2M Write current setting resistor. Connect the Write current setting resistor RW2 between this pin and VCC to set the Write current.
A.GND
26
W/C1 COMP
--
Vcc
26 28 W/C2 COMP -- 28
A.GND
Connection for 1M Write current compensation resistor. Connect the Write current compensation resistor RWC1 between this pin and Pin 25 (W/C1SET) to set the amount of increase in the Write current. Connection for 2M Write current compensation resistor. Connect the Write current compensation resistor RWC2 between this pin and Pin 27 (W/C2SET) to set the amount of increase in the Write current.
--5--
CXA1720Q
Pin No. 29 30
Symbol D. GND ERASE OUT0
Pin voltage -- --
Equivalent circuit
Description Digital system GND connection. Erase current output for the HEAD0 system.
Vcc
30 31 ERASE OUT1 -- 31 Erase current output for the HEAD1 system.
D.GND 32 POWER SAVE -- Vcc 162k Power saving signal input. When the logical voltage is low, the IC is in power saving mode. In power saving mode, only the power supply ON/OFF detection function operates.
1k 32 2.1V A.GND
--6--
CXA1720Q
Electrical Characteristics Current Consumption
Item Symbol Conditions VCC=5 V WG="H" VCC=5 V WG="L", EG="L" VCC=5 V PS="L" Measure- Measurement ment circuit point -- -- -- -- -- -- Min.
(Ta=25 C, VCC=V)
Typ. Max. Unit
Current consumption for Read Current consumption for Write/Erase Current consumption for Power saving
ICCR ICCWE ICCPS
13.0 8.0
23.0 14.0 0.9
33.0 20.0 1.8 mA
Power Supply Monitoring System
Item Power supply ON/OFF detector threshold voltage Power ON output saturation voltage Symbol Conditions Measure- Measurement ment circuit point -- VCC=3.5 V I=1 mA -- -- -- Min. Typ.
(Ta=25 C)
Max. Unit
VTH VSP
3.5
3.9
4.3 V 0.5
Read System
Item Pre-amplifier voltage gain SIDE0 Pre-amplifier voltage gain SIDE1 Pre-amplifier frequency response SIDE0 Pre-amplifier frequency response SIDE1 Pre-amplifier input conversion noise voltage SIDE0 Pre-amplifier input conversion noise voltage SIDE1 EN1 EN0 Symbol Conditions f=100 kHz SW4=a, b f=100 kHz GV1 SW4=a, b SW1, 5=b BW0 AV/AV0=-3 dB SW4=a, b AV/AV1=-3 dB BW1 SW4=a, b SW1, 5=b Bandwidth=400 Hz to 1 MHz Vi=0, SW4=b Bandwidth=400 Hz to 1 MHz SW4=b Vi=0, SW1, 5=b 1 G 2.0 2.9 Vrms 1 G 5 MHz 1 G 38.1/ 44.1 40/46 41.6/ 47.6 dB Measure- Measurement ment circuit point Min. Typ. Max. Unit
GV0
When SW4 = a: Vi = 10 mVp-p When SW4 = b: Vi = 5 mVp-p --7--
CXA1720Q
Read System
Item Symbol Conditions Vi=0 VOFSP SW4=a, b, SW1, 5=a, b f=100 kHz VOP SW4=a, b, SW1, 5=a, b VOFSF Vi=0 VOF ETM1 ETM1' f=100 kHz Vi=60 mVp-p RA=27 k Refer to Fig. 1 RA=27 k Refer to Fig. 1 IOL=2 mA IOH=-0.4 mA RL=2 k CL=20 pF RL=2 k CL=20 pF Vi=0.25 mVp-p to Peak shift PS 10 mVp-p f=62.5 kHz Refer to Fig. 1 1 A 1 1 D, E D, E B, C A -100 2.8 1 G 1.8 1 F, G -500 Measure- Measurement ment circuit point Min.
(Ta=25 C, VCC=5 V)
Typ. Max. Unit
Pre-amplifier output offset voltage (vs. VREF) Pre-amplifier output voltage amplitude Filter differential output offset voltage Filter differential output voltage amplitude Time domain filter monostable multivibrator No. 1 pulse width precision Time domain filter monostable multivibrator No. 2 pulse width (fixed) Read data output low voltage Read data output high voltage Read data output rise time Read data output fall time
+500
mV
Vp-p
+100
mV Vp-p
1
-10
+10
%
T2 VOL VOH TR TF
1 1 1 1 1
A A A A A
260
400
540 0.5
ns V V
2.8 100 100
ns ns
1
%
When SW4 = a: Vi = 60 mVp-p When SW4 = b: Vi = 30 mVp-p
Read data output between 0.5 V to 2.4 V For Vi = 0.25 mVp-p to 5m Vp-p: SW4 = b (pre-amplifier voltage gain: 46 dB) For Vi = 0.5 mVp-p to 10 mVp-p: SW4 = a (pre-amplifier voltage gain: 40 dB)
--8--
CXA1720Q
Comparator input (Measurement points B and C)
Read data output (Measurement point A)
1.4V
T1
T2
TA
TB
Fig. 1 Monostable multivibrator Nos. 1 and 2 pulse width precision and peak shift measurement conditions * Monostable multivibrator No. 1 pulse width precision When HD = high: T1 ( 2.45 S -1) x 100 (%)
ETM1 =
When HD is low: T1 ( 1.25 S -1) x 100 (%)
ETM1' =
* Monostable multivibrator No. 2 pulse width = T2 * Peak shift 1 2 TA-TB x 100 (%) TA+TB
PS =
--9--
CXA1720Q
Read System (Filters)
Item Symbol Conditions Vi=3mVp-p HG="L" HD="H" FC="H" Refer to Fig. 2 at fO1 Refer to Fig. 2 G11 at 1 3 fO1 1 D, E -7.6 Measure- Measurement ment circuit point 1 1 D, E G D, E Min.
(Ta=25 C, VCC=5 V)
Typ. Max. Unit
Peak frequency Peak voltage gain
FO1 GP1
153.0 3.6
170.0 5.5
187.0 7.1
kHz
1M/ outer
track Frequency response (1)
-7.1
-6.6
dB
Frequency response (2)
G12
Refer to Fig. 2 at 3fO1 Vi=3mVp-p HG=":L" HD="H" FC="L" Refer to Fig. 2 at fO2 Refer to Fig. 2 1 3
1
D, E
-25.0
-23.1
-21.5
Peak frequency
fO2
1
D, E G D, E D, E
163.8
182.0
200.2
kHz
1M/ inner track
Peak voltage gain
GP2
1
3.6
5.5
7.1
Frequency response (1)
G21
at
fO2
1
-7.6
-7.1
-6.6
dB
Frequency response (2) Peak frequency Peak voltage gain
G22 fO3 GP3
Refer to Fig. 2 at 3fO2 Vi=3mVp-p HG="L" HD="L" FC="H" Refer to Fig. 2 at fO3 Refer to Fig. 2 1 3
1 1 1
D, E D, E G D, E D, E
-25.0 288.0 3.6
-23.1 320.0 5.5
-21.5 352.0 7.1 kHz
2M/ outer
track Frequency response (1)
G31
at
fO3
1
-7.6
-7.1
-6.6
dB
Frequency response (2) Peak frequency Peak voltage gain
G32 fO4 GP4
Refer to Fig. 2 at 3fO3 Vi=3mVp-p HG="L" HD="L" FC="L" Refer to Fig. 2 at fO4 Refer to Fig. 2 1 3
1 1 1
D, E D, E G D, E D, E
-25.0 310.5 5.3
-23.1 345.0 7.2
-21.5 379.5 8.8 kHz
2M inner
track Frequency response (1)
G41
at
fO4
1
-8.6
-8.1
-7.6
dB
Frequency response (2)
G42
Refer to Fig. 2 at 3fO4
1
D, E
-36.2
-34.3
-32.7
GPN = 20Log10 (VFilterout/VPreout)
VFilterout: Filter differential output voltage (N=1 to 4) --10--
CXA1720Q
(dB) GPN G1N
G2N
1 f0 3 (N=1 to 4)
f0
3f0
f(Hz)
Fig. 2 Filter frequency response measurement conditions
--11--
CXA1720Q
Write/Erase System
Item Symbol Conditions WG="L" RW=4.3 k WG="L" RW=4.3 k WG="L" EWC ILKW VSW ILKE RW=4.3 k RWC=12 k WG="L" WG="L" SW1=6 EG="L" EG="L" VSE I=30 mA SW2=b 2 M'N' 2 2 2 LKJI L'K'J'I' MN 2 LKJI -10 Measure- Measurement ment circuit point 2 2 LKJI LKJI Min.
(Ta=25 C, VCC=5 V)
Typ. Max. Unit
Write current output precision Write current output unbalance Write current compensation current precision Head I/O pin leak current for Write Head I/O pin saturation voltage for Write Leak current for Erase current switch Output saturation voltage for Erase current switch
EW DW
-7 -1
+7 +1
%
+10 10 1 10 A V A
500
mV
Write current output precision
EW =
IW ( 2.70 mA
-1 x 100 (%)
)
Write current compensation current precision
EWC =
IW'-IW ( 0.90 mA -1) x 100 (%)
IW: WRITE CURRENT = "H" Logic Input Block
Item
IW': WRITE CURRENT = "L"
Symbol
Conditions
Measure- Measurement ment circuit point 2 2 2 2 BCDE FGHP BCDE FGHP A A ABCD EFGHP ABCD EFGHP
Min.
Typ.
Max.
Unit
Digital low input voltage Digital high input voltage Schmitt-type digital low input voltage Schmitt-type digital high input voltage Digital low input current Digital high input current
VLD VHD VLSD VHSD ILD IHD VL=0 V VH=5 V
0.8 2.0 V 0.8 2.0 -20 A 10
2 2
--12--
CXA1720Q
Electrical Characteristics Measurement Circuit 1
G F
1/2V 1 a b SW5
-1/2V 1 a b 0.1
b
a SW4 E
24
23
22
21
20
19
18
17
HEAD 0A
HEAD 0B
HEAD 1A
HEAD 1B
PREAMP OUT
4.3k 12k
25 W/C 1 SET W/C 1 26 COMP
FILTER OUT A
HIGH GAIN
VREF
FILTER OUT B
16 3300p 3300p
D
COMP IN B 15 COMP 14 IN A A.GND 13 CXA1720Q
C
4.3k 12k
W/C 2 27 SET 28 W/C 2 COMP 29 D.GND ERASE 30 OUT 0 31 ERASE OUT 1
B
MMVA 12 FILTER SET 11 Vcc 10 HIGH DENSITY
27k
3.2k 5V SW3 b
FILTER CONTROL
POWER ON
WRITE DATA
WRITE GATE
ERASE GATE
SIDE 1
1
2
READ DATA
32 POWER SAVE
WRITE CURRENT
9
a
3
4
5
6
7
8
SW1 SW2 abab
A
Note) Unless otherwise specified, switches are assumed to be set to "a". Electrical Characteristics Measurement Circuit 2
H 2.2k L SW1 a K ba 2.2k J ba 2.2k I ba b 0.1 2.2k
L' 24
K' 23
J' 22
I' 21 20 19 18 17
HEAD 0A
HEAD 0B
HEAD 1A
HEAD 1B
4.3k 12k
W/C 1 25 SET W/C 1 26 COMP
PREAMP OUT
FILTER OUT A
VREF
HIGH GAIN
FILTER OUT B
16
COMP IN B 15 COMP 14 IN A A.GND 13 CXA1720Q
4.3k 12k
W/C 2 27 SET W/C 2 28 COMP 29 D.GND
MMVA 12 27k FILTER SET 11 Vcc 10 HIGH DENSITY
100k M 30mA 100k N 30mA
a b a b SW2
M'
ERASE 30 OUT 0 ERASE 31 OUT 1
3.2k 5V
N'
SIDE 1 FILTER CONTROL
POWER ON
1
2
3
4
5
ERASE GATE
WRITE DATA
WRITE GATE
32
READ DATA
POWER SAVE
WRITE CURRENT
9
G
6
7
8
P
A
B
C
D
E
F
Note) Unless otherwise specified, switches are assumed to be set to "a". --13--
CXA1720Q
Description of Operation (1) Read system Pre-amplifier The pre-amplifier amplifies input signals. The voltage gain can be switched between 40 dB and 46 dB, using Pin 20. Filters The filters differentiate the signals amplified by the pre-amplifier. The high-band noise components are attenuated by the low-pass filter. The filters can be switched among four modes, depending on the settings of Pins 8 and 9. In 1M/outer track mode, the peak frequency fO1 is set by external resistor RF. fO for the other three modes is switched by the internal settings of the IC, with fO1 used as a reference (1.00). The filters are explained below. 1) Active filter block
19 Pre-amplifier output
Pre-amplifier output
17 BPF Secondary fOB=1.2XfCL Q=0.577 LPF Tertiary fCL; variable Q; variable HPF Primary fCH=5KHz Gain; 8.0dB Amp. 16
Filter output A
Filter output B
Filter Characteristics Table 1 Pin 8 H L H L Pin 9 H H L L LPF characteristics 1M/outer track mode: 1M/inner track mode: 2M/outer track mode: 2M/inner track mode: fO ratio 1.00 1.07 1.88 2.03
Butterworth Butterworth Butterworth Chebyshev 1 dB ripple
The formula for the peak frequency f01 for 1M/outer track mode is shown below: f01 = 527/RF + 5.8 (kHz) f01: peak frequency in 1M/outer track mode RF: filter setting resistance (k) The relationship between f01 and f0 in the four modes is as follows: 1M/outer track: f01 = 1.0 x f01 1M/inner track: f02 = 1.07 x f01 2M/outer track: f03 = 1.88 x f01 2M/inner track: f04 = 2.03 x f01 Note that these filters can be customized. Customization is explained on pages 17 and 18. --14--
CXA1720Q
Comparator The comparator detects the crosspoint of the filter differential output. Time domain filter The time domain filter converts the comparator output to Read data. This filter is equipped with two monostable multivibrators. Monostable multivibrator No. 1 eliminates unnecessary pulses, and monostable multivibrator No. 2 determines the pulse width of Read data. The monostable multivibrator No. 1 pulse width TA is determined by the resistor RA between Pin 12 and A.GND. TA can be switched as follows by the setting of Pin 9: HIGH DENSITY = "H" TA LOW = 84RA + 180 (nS) RA (k) HIGH DENSITY = "L" TA HIGH = 42RA + 110 (nS) The pulse width for monostable multivibrator No. 2 is fixed at 400 ns. (2) Write System Write data input through Pin 2 is frequency-divided by the T flip-flop and generates the head recording current. The recording current can be switched by the setting of Pin 9. The Write current Iw is set by the resistor RW connected between Pin 25 and VCC and between Pin 27 and VCC. IW = 11.6/RW (mA) RW (k) Furthermore, the Write current compensation IWC is set by the resistor RWC connected between Pin 25 and Pin 26, and between Pin 27 and Pin 28. IWC = 10.8/RWC (mA) RWC (k) (3) Erase System Pins 30 and 31 are open collector outputs; the Erase current is set by the resistance between these pins and the Erase head. (4) Power ON/OFF Detection System The power ON/OFF detection system detects a reduced voltage. When VCC is below the stipulated voltage, the Write system and Erase system cease operation, disabling the Write and Erase functions Notes on Operation * Select the voltage gain so that the pre-amplifier output amplitude is 1 Vp-p or less. If the pre-amplifier output amplitude exceeds 1 Vp-p, the filter output waveform becomes distorted. * Observe the following points when mounting this IC. * Connect a VCC decoupling capacitor of approximately 0.1 F close to the IC. * The ground should be as large as possible.
--15--
CXA1720Q
Application Circuit (for 1M/2M devices)
PREAMP OUT
CREF 0.1 VREF 18 FILTER OUT A 17 FILTER OUT B
HEAD HEAD HEAD HEAD 1B 1A 0A 0B 24 W/C 1SET 23 22 21
HIGH GAIN 20 19
RWC1
RW1
25
PREAMP FILTER DIFF+LPF (BPF)
16
CB 3300P CA 3300P
W/C 1COMP 26 W/C 2 SET 27 WRITE DRIVER
15
COMP IN B
RWC2
RW2
14 COMP IN A 13
COMP
W/C 2 COMP D.GND RE0 ERASE OUT 0 ERASE OUT 1 POWER SAVE
28
A.GND RA 27k RF 3.2k
29
ERASE DRIVER
12
MMVA FILTER SET
30
11
RE1
TIME DOMAIN FILTER
31
POWER MONITOR
CONTROL LOGIC
10
Vcc HIGH DENSITY 5V
32
9
1
2
3
4
5
6
7
8
POWER ON
WRITE DATA
READ WRITE WRITE DATA CURRENT GATE
ERASE GATE
SIDE 1
FILTER CONTROL
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
--16--
CXA1720Q
Customization Filter frequency response In 2M/inner track mode, the filter frequency response can be changed as shown below.
B. P. F Q=0.577
(Differential characteristics)
L. P. F Tertiary Butterworth
L. P. F Tertiary Chebyshev 1dBRp
(High-band noise cut-off)
No. 2
No. 3
(Comprehensive characteristics)
--17--
CXA1720Q
Filter Customization Selections/Combinations In filter settings, use the LPF cut-off frequency fC1 in 1M/outer track mode as 1.00 as shown in Table 1 to select fc ratios and LPF types for the other three modes. The 1M/outer track to 2M/outer track modes for the LPF are fixed to Butterworth, while either Butterworth or Chebyshev 1 dB ripple can be selected in 2M/inner track mode. Note that the BPF center frequency foB is fixed at 1.2 times the LPF cut-off frequency fc. In addition, the relationship between the peak frequencies fo and fc in regards to the comprehensive characteristics is as follows, depending on differences in LPFs. Butterworth characteristics: Chebyshev 1 dB ripple characteristics: fC = 1.28fo fC = 1.12fo
Table 1 LPF fc Ratios and Types Mode 1M/outer track LPF type Butterworth 1.00 fc ratio when fc1 is assumed as 1.00
1M/inner track
Butterworth
1.07 1.60 1.33 1.68 2.29 1.33 1.68 2.29
1.14 2.00 1.39 1.78 2.46 1.39 1.78 2.46
1.23
1.33
1.45
2M/outer track
Butterworth Butterworth Chebyshev (1 dB ripple)
2M/inner track
1.45 1.88 2.67 1.45 1.88 2.67
1.52 2.00 1.52 2.00
1.60 2.13 1.60 2.13
Note) The boxed item indicates the setting for the CXA1720Q.
--18--
CXA1720Q
Normalized pre-amplifier voltage gain (dB)
Normalized pre-amplifier voltage gain and phase vs. Frequency
Vcc=5V, Ta=25C When HD=high, low
Phase
-2 -4 -6 -8 -10 30 60 90 120 150
10k
100k
1M
10M
100M
f-Frequency (Hz) Filter characteristics in the four modes (These characteristics are based on pre-amplifier output. 0dB=pre-amplifier output level)
Normalized filter voltage gain (dB)
Normalized filter voltage gain (dB)
1M/outer track
10 0 -10 -20 -30 -40 -50 -60 -70 10k 50k 100k 300k 1M
VCC=5V, Ta=25C RF=3.2k
1M/inner track
10 0 -10 -20 -30 -40 -50 -60 -70 10k 50k 100k 300k 1M
Phase (degree)
VCC=5V, Ta=25C RF=3.2k
0
Voltage Gain
0
200
200 150 100
Phase (degree)
150 100
Voltage gain 50 Phase
0 -50 -100 -150 -200 3M
Voltage gain 50 Phase
0 -50 -100 -150 -200 3M
f01=170 (KHz) Frequency (Hz)
f02=182 (KHz) Frequency (Hz)
Normalized filter voltage gain (dB)
Phase (degree)
150
-10 -20 -30 -40 -50 -60 -70 10k 50k 100k 300k 1M
Voltage gain Phase
100 50 0 -50 -100 -150 -200
-10 -20 -30 -40 -50 -60 -70 10k 50k 100k 300k 1M 3M
150 100
Voltage gain 50 Phase
0 -50 -100 -150 -200
3M
f03=320 (KHz) Frequency (Hz)
f04=345 (KHz) Frequency (Hz)
--19--
Phase (degree)
10 0
200
Normalized filter voltage gain (dB)
2M/outer track
VCC=5V, Ta=25C RF=3.2k
2M/inner track
10 0
VCC=5V, Ta=25C RF=3.2k
200
Phase (degree)
CXA1720Q
Normalized pre-amplifier voltage gain+filter voltage gain vs. Ambient temperature 1.50
NGV-Normalized pre-amplifier voltage gain +filter voltage gain
f=100KHz Vcc=5V Vin=10mVp-p (HG="H") Vin=5mVp-p (HG="L") NGV=GV/GV (Ta=25C)
11 1.00 RF 3.2k
Vcc
0.50 -20
0
20 40 60 Ta-Ambient temperature (C)
80
Normalized pre-amplifier voltage gain+filter voltage gain vs. Supply voltage 1.50
NGV-Normalized pre-amplifier voltage gain +filter voltage gain
Ta=25C f=100KHz Vin=10mVp-p (HG="H") Vin=5mVp-p (HG="L") NGV=GV/GV (Vcc=5V)
11 1.00 RF 3.2k
Vcc
0.50 4.0 5.0 Vcc-Supply voltage (V) 6.0
Normalized monostable multivibrator No. 1 pulse width vs. Ambient temperature 1.05
NTA-Normalized monostable multivibrator No. 1 pulse width
Vcc=5V NTA=TA/TA (Ta=25C) When HD=high, low
12 1.00 RA 27k
0.95 -20
0
20 40 60 Ta-Ambient temperature (C)
80
--20--
CXA1720Q
Normalized monostable multivibrator No. 1 pulse width vs. Supply voltage 1.05
NTA-Normalized monostable multivibrator No. 1 pulse width
Ta=25C NTA=TA/TA (Ta=25C) When HD=high, low
12 1.00 RA 27k
0.95 4.0 5.0 Vcc-Supply voltage (V) 6.0
TA-Monostable multivibrator No. 1 pulse width (S)
Monostable multivibrator No. 1 pulse width vs. RA 10
Vcc=5V Ta=25C
5 TA LOW
12 RA
1
TA LOW=84RA+180 (ns) TA HIGH=42RA+110 (ns) RA (k)
TA HIGH 0.3 3 5 10 RA (k) 50 100
Normalized read data pulse width vs. Ambient temperature 1.05
NTB-Normalized read data pulse width
Vcc=5V NTB=TB/TB (Ta=25C)
1.00
0.95 -20
0
20 40 60 Ta-Ambient temperature (C)
80
--21--
CXA1720Q
Normalized read data pulse width vs. Supply voltage 1.05
NTB-Normalized read data pulse width
Ta=25C NTB=TB/TB (Vcc=5V)
1.00
0.95 4.0 5.0 Vcc-Supply voltage (V) 6.0
Normalized write current vs. Ambient temperature 1.05
Vcc=5V NIW=IW/IW (Ta=25C)
NIW-Normalized write current
25
26
RWC1
27
28
RWC2
1.00
RW1
12k 4.3k
RW2
12k 4.3k
Vcc
Vcc
0.95 -20
0
20 40 60 Ta-Ambient temperature (C)
80
Normalized write current vs. Supply voltage 1.05
NIW-Normalized wriet current
Ta=25C NIW=IW/IW (Vcc=5V)
25 1.00
RW1
26
RWC1 12k 4.3k
27
28
RWC2 12k 4.3k
RW2
Vcc
Vcc
0.95 4.0 5.0 Vcc-Supply voltage (V) 6.0
--22--
CXA1720Q
Write current vs. RW
IW-Write current (mA)
10.0
Vcc=5V Ta=25C IW=11.6/Rw (mA) Rw (k)
25 5.0
RW1
27
RW2
Vcc
Vcc
1.0 1K Rw (k) 5K 10K
Normalized write compensation current vs. Ambient temperature
NIWC-Normalized write compensation current
1.05
Vcc=5V NIWC=IWC/IWC (Ta=25C)
25 1.00
RW1
26
RWC1 12k 4.3k
27
28
RWC2
RW2
12k 4.3k
Vcc
Vcc
0.95 -20
0
20 40 60 Ta-Ambient temperature (C)
80
Normalized Write compensation current vs. Supply voltage
NIWC-Normalized Wriet compensation current
1.05
Ta=25C NIWC=IWC/IWC (Vcc=5V)
25 1.00
RW1 Vcc
26
RWC1 12k 4.3k
27
28
RWC2 12k 4.3k
RW2 Vcc
0.95 4.0 5.0 Vcc-Supply voltage (V) 6.0
--23--
CXA1720Q
Write current compensation vs. Rwc 10.0
IWC-Write current compensation (mA)
Vcc=5V Ta=25C IWC=10.8/Rwc (mA) Rwc (k)
25 1.0
RW1
26
RWC1 4.3k
27
28
RWC2
RW2
4.3k
Vcc
Vcc
0.1
1.0
10.0 Rwc (k)
100.0 (k)
VTH-Power supply ON/OFF detector threshold voltage (V)
Power supply ON/OFF detector threshold voltage vs. Ambient temperature 4.2 ON threshold voltage 4.1
4.0
3.9 OFF threshold voltage 3.8
3.7 -20
0
20 40 60 Ta-Ambient temperature (C)
80
Normalized filter peak frequency vs. Ambient temperature 1.05
Nf0-Normalized filter peak frequency
Vcc=5V Nf0=f0/f0 (Ta=25C)
11 1.00
RF 3.2k
Vcc
0.95 4.0 5.0 6.0 Ta-Ambient temperature (C)
--24--
CXA1720Q
Normalized filter peak frequency vs. Supply voltage characteristics 1.05
Nf0-Normalized filter peak frequency
Vcc=5V Nf0=f0/f0 (Ta=25C)
11 1.00
RF 3.2k
Vcc
0.95
4.0
5.0 Vcc-Supply voltage (V)
6.0
1M/outer track peak frequency vs. RF
1f01-1M/outer track peak frequency (kHz)
250
Vcc=5V Ta=25C
11 200
RF
150
Vcc F01=527/RF+5.8 (KHz)
2.0
3.0 RF (k)
4.0
--25--
CXA1720Q
Package Outline
Unit : mm
32PIN QFP (PLASTIC)
9.0 0.2 + 0.3 7.0 - 0.1 24 17 + 0.35 1.5 - 0.15
0.1
25
16
32
9
+ 0.2 0.1 - 0.1
1 0.8 + 0.15 0.3 - 0.1
8 + 0.1 0.127 - 0.05 0 to 10
0.24
M
PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE QFP-32P-L01 QFP032-P-0707 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS
EPOXY RESIN SOLDER PLATING 42 ALLOY 0.2g
--26--
0.50
(8.0)


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